Performance Nonmonotonicities: A Case Study of the UltraSPARC Processor
dc.contributor.advisor | Strumpen, Volker | en_US |
dc.contributor.advisor | Leiserson, Charles E. | en_US |
dc.contributor.author | Kushman, Nathaniel A. | en_US |
dc.date.accessioned | 2023-03-29T15:31:59Z | |
dc.date.available | 2023-03-29T15:31:59Z | |
dc.date.issued | 1998-06 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/149895 | |
dc.description.abstract | Modern microprocessor architectures are very complex designs. Consequently, they exhibit many idiosyncrasies. In fact, situations exist in which the addition or removal of a single instruction changes the performance of a program by a factor of 3 to 4. I | en_US |
dc.relation.ispartofseries | MIT-LCS-TR-782 | |
dc.title | Performance Nonmonotonicities: A Case Study of the UltraSPARC Processor | en_US |