Maps: A Compiler-Managed Memory System for Software-Exposed Architectures
dc.contributor.advisor | Amarasinghe, Saman | en_US |
dc.contributor.advisor | Agarwal, Anant | en_US |
dc.contributor.author | Barua, Rajeev | en_US |
dc.date.accessioned | 2023-03-29T15:32:37Z | |
dc.date.available | 2023-03-29T15:32:37Z | |
dc.date.issued | 2000-01 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/149907 | |
dc.description.abstract | Microprocessors must exploit both instruction-level parallelism (ILP) and memory parallelism for high performance. Sophisticated techniques for ILP have boosted the ability of modern-day microprocessors to exploit ILP when available. Unfortunately, impro | en_US |
dc.relation.ispartofseries | MIT-LCS-TR-799 | |
dc.title | Maps: A Compiler-Managed Memory System for Software-Exposed Architectures | en_US |