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dc.contributor.advisorAmarasinghe, Samanen_US
dc.contributor.advisorAgarwal, Ananten_US
dc.contributor.authorBarua, Rajeeven_US
dc.date.accessioned2023-03-29T15:32:37Z
dc.date.available2023-03-29T15:32:37Z
dc.date.issued2000-01
dc.identifier.urihttps://hdl.handle.net/1721.1/149907
dc.description.abstractMicroprocessors must exploit both instruction-level parallelism (ILP) and memory parallelism for high performance. Sophisticated techniques for ILP have boosted the ability of modern-day microprocessors to exploit ILP when available. Unfortunately, improen_US
dc.relation.ispartofseriesMIT-LCS-TR-799
dc.titleMaps: A Compiler-Managed Memory System for Software-Exposed Architecturesen_US


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