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dc.contributor.advisorLi-Shiuan Peh
dc.contributor.authorSun, Chenen_US
dc.contributor.authorChen, Chia-Hsin Owenen_US
dc.contributor.authorKurian, Georgeen_US
dc.contributor.authorWei, Lanen_US
dc.contributor.authorMiller, Jasonen_US
dc.contributor.authorAgarwal, Ananten_US
dc.contributor.authorPeh, Li-Shiuanen_US
dc.contributor.authorStojanovic, Vladimiren_US
dc.contributor.otherComputer Architectureen
dc.date.accessioned2012-02-08T20:15:04Z
dc.date.available2012-02-08T20:15:04Z
dc.date.issued2012-02-08
dc.identifier.urihttp://hdl.handle.net/1721.1/69050
dc.description.abstractWith the advent of many-core chips that place substantial demand on the NoC, photonics has been investigated as a promising alternative to electrical NoCs. While numerous opto-electronic NoCs have been proposed, their evaluations tend to be based on fixed numbers for both photonic and electrical components, making it difficult to co-optimize. Through our own forays into opto-electronic NoC design, we observe that photonics and electronics are very much intertwined, reflecting a strong need for a NoC modeling tool that accurately models parameterized electronic and photonic components within a unified framework, capturing their interactions faithfully. In this paper, we present a tool, DSENT, for design space exploration of electrical and opto-electrical networks. We form a framework that constructs basic NoC building blocks from electrical and photonic technology parameters. To demonstrate potential use cases, we perform a network case study illustrating data-rate tradeoffs, a comparison with scaled electrical technology, and sensitivity to photonics parameters.en_US
dc.format.extent8 p.en_US
dc.relation.ispartofseriesMIT-CSAIL-TR-2012-004
dc.rightsCreative Commons Attribution-NonCommercial-ShareAlike 3.0 Unporteden
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/3.0/
dc.titleDSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modelingen_US
dc.language.rfc3066en-US


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